DocumentCode
914676
Title
On the Repair of Redundant RAM´s
Author
Wey, Chin-Long ; Lombardi, Fabrizio
Author_Institution
Department of Electrical Engineering and Systems Science, Michigan State University, East Lansing, MI, USA
Volume
6
Issue
2
fYear
1987
fDate
3/1/1987 12:00:00 AM
Firstpage
222
Lastpage
231
Abstract
This paper describes a set of novel conditions that can be integrated in a computer-aided-testing (CAT) package for repair of redundant RAM´s. A new approach is proposed; the innovative feature of this approach is the independence of analysis on the distribution of faulty bits in memory. This results in better exploitation of redundancy and efficient adaptability of this technique to various testing methods, such as the ones that employ region totalizers and fault counters. Algorithms that provide repair solution and earliest detection of unrepairability of a device are presented. The benefits that result by using this approach include a reduction in repair time. Conditions of unrepairability are given as a function of the number of spare resources (columns and rows) in the redundant memory; significant improvement over existing techniques is accomplished. Simulation results are provided to substantiate the validity of the proposed theory.
Keywords
Computer-Aided Testing; Design for Testability; Redundant Memory; Testing; Algorithm design and analysis; Circuit faults; Decoding; Packaging; Production; Random access memory; Read-write memory; Redundancy; Testing; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1987.1270266
Filename
1270266
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