Title :
Algorithms for an Advanced Fault Simulation System in MOTIS
Author :
Lo, Chi-Yuan ; Nham, Hao N. ; Bose, Ajoy K.
Author_Institution :
AT&T Bell Laboratories, Murray Hill, NJ, USA
fDate :
3/1/1987 12:00:00 AM
Abstract :
In this paper, we will present algorithms developed for an advanced fault simulation system in the MOTIS simulation environment. In particular, the algorithm to perform fault modeling and collapsing is first reviewed. Efficient algorithms to perform fault simulation are discussed in terms of fault list manipulation and primitive evaluation. The simulator realizes a speed gain factor of 787 to 2088 over serial fault simulation. Special emphasis is on an innovative fast unit delay fault simulation algorithm that achieves an additional 33-39-percent improvement in speed and 20-28-percent improvement in memory usage.
Keywords :
Circuit faults; Circuit simulation; Data structures; Delay; Logic circuits; Logic gates; Memory management; Performance evaluation; Production; Tree data structures;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.1987.1270267