• DocumentCode
    915011
  • Title

    Statistical exploration approach to design centring

  • Author

    Soin, R.S. ; Spence, R.

  • Author_Institution
    Philips, Research Laboratories, Redhill, UK
  • Volume
    127
  • Issue
    6
  • fYear
    1980
  • fDate
    12/1/1980 12:00:00 AM
  • Firstpage
    260
  • Lastpage
    269
  • Abstract
    This paper addresses the problem of design centering; that is, the maximisation of manufacturing yield by suitable choice of nominal component parameter values while the tolerances and form of the probability density function of the parameters are assumed fixed. In the technique discussed, Monte Carlo analysis is performed for a particular set of nominal values. The results of the analysis are then used both to estimate yield and to choose new nominal values which are expected to increase yield. The procedure is repeated until no further increases in yield occur. The heuristic algorithm employed is based on the relative positions, in component space, of the centres of gravity of the pass and fail circuits as identified by the Monte Carlo analysis. The effectiveness of the procedure is illustrated for a number of circuit examples ranging from seven to forty-three toleranced components. Experience strongly suggests that the number of iterations required is independent of dimensionality (the number of toleranced components). Unlike other methods of design centering, the method does not require assumptions regarding the convexity or connectivity of the region of acceptability. Finally, to moderate the computational cost of iteratively performing Monte Carlo analysis, special sampling schemes are employed which reduce the number of sample circuits required to be analysed by each Monte Carlo analysis.
  • Keywords
    Monte Carlo methods; network synthesis; optimisation; statistical analysis; Monte Carlo analysis; design centering; heuristic algorithm; manufacturing yield; maximisation; statistical analysis; tolerances;
  • fLanguage
    English
  • Journal_Title
    Electronic Circuits and Systems, IEE Proceedings G
  • Publisher
    iet
  • ISSN
    0143-7089
  • Type

    jour

  • DOI
    10.1049/ip-g-1:19800045
  • Filename
    4644675