DocumentCode :
915045
Title :
Theory of clocking for maximum execution overlap of high-speed digital systems
Author :
Park, Nohbyung ; Parker, Alice C.
Author_Institution :
Dept. of Electr. Eng., California Univ., Irvine, CA, USA
Volume :
37
Issue :
6
fYear :
1988
fDate :
6/1/1988 12:00:00 AM
Firstpage :
678
Lastpage :
690
Abstract :
The effect of clocking schemes on overlapped execution performance in a digital system is described and quantified. Effects of branching, data dependencies, and resource conflicts between consecutive tasks are considered. Some problems of clocking scheme synthesis for the design of digital systems with maximum execution overlap are examined. Effects of performance of the choice of clocking scheme, partitioning of functions into the time steps, the number of clock phases, the length of each phase (i.e., how to pipeline), and the assignment of functions to clock phases are treated
Keywords :
clocks; digital systems; performance evaluation; branching; clocking; data dependencies; high-speed digital systems; maximum execution overlap; resource conflicts; Clocks; Combinational circuits; Control systems; Digital systems; Logic design; Optimal control; Pipelines; Sequential circuits; Synchronization; Timing;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.2206
Filename :
2206
Link To Document :
بازگشت