• DocumentCode
    915079
  • Title

    Fast economical binary divider

  • Author

    Gardiner, A.B.

  • Author_Institution
    Monash University, Department of Electrical Engineering, Melbourne, Australia
  • Volume
    7
  • Issue
    23
  • fYear
    1971
  • Firstpage
    691
  • Lastpage
    692
  • Abstract
    By eliminating the shift operation of a shift-and-subtract divider, array dividers speed up division. Since n+1 subtractors are required, there is a heavy equipment cost. However, since each parallel subtraction is data dependent, the subtractions are sequential and only one subtractor is operating at any one time. Here a divider is developed which speeds division by eliminating the shift cycle, but which only requires two parallel subtractors working sequentially.
  • Keywords
    dividing circuits; fast economical binary divider; shift and subtract divider; shift operation elimination; two parallel subtractors working sequentially;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19710472
  • Filename
    4235377