• DocumentCode
    915330
  • Title

    Algorithmic Aspects of One-Dimensional Layout Compaction

  • Author

    Doenhardt, Jurgen ; Lengauer, Thomas

  • Author_Institution
    Universitat-Gesamthoschule-Paderborn, Paderborn, Germany
  • Volume
    6
  • Issue
    5
  • fYear
    1987
  • fDate
    9/1/1987 12:00:00 AM
  • Firstpage
    863
  • Lastpage
    878
  • Abstract
    We present a theory of one-dimensional layout compaction that is based on the graph theoretic approach used in such compacters as reported in [5], [7], [11], and [26]. Compaction here consists of two steps. In the first stage, a directed graph is extracted from the layout. In the second stage, compaction is performed by solving a single-source shortest path problem on this graph. The paper presents new efficient algorithms and/or heuristics for the first stage of the compaction process. A compacter based on the framework presented here that incorporates the algorithms described is a powerful tool that can easily be tailored to specific applications. It allows a tradeoff between the space and runtime performance of the compacter and the quality of the compaction.
  • Keywords
    Algorithm design and analysis; Circuit synthesis; Compaction; Design automation; NP-complete problem; Runtime; Shortest path problem; Writing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.1987.1270329
  • Filename
    1270329