• DocumentCode
    915519
  • Title

    Charge-Sharing Models for Switch-Level Simulation

  • Author

    Chu, Chorng-Yeong ; Horowitz, Mark Alan

  • Author_Institution
    Center for Integrated Systems, Stanford University, Stanford, CA, USA
  • Volume
    6
  • Issue
    6
  • fYear
    1987
  • fDate
    11/1/1987 12:00:00 AM
  • Firstpage
    1053
  • Lastpage
    1061
  • Abstract
    This paper addresses various timing and glitch detection issues in switch-level simulation. Particular attention is focused on charge sharing. We categorize and analyze problems caused by charge sharing. Solutions to these problems are proposed and applied to real designs. Results are reported and compared with SPICE simulation. The computational complexity of our methods is also investigated.
  • Keywords
    Circuit simulation; Computational complexity; Computational modeling; Differential equations; MOS devices; Process design; SPICE; Switches; Timing; Voltage;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.1987.1270346
  • Filename
    1270346
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=915519