• DocumentCode
    916298
  • Title

    A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process

  • Author

    Bakkaloglu, Bertan ; Fontaine, Paul ; Mohieldin, Ahmed Nader ; Peng, Solti ; Fang, Sher Jiun ; Dülger, Fikret

  • Author_Institution
    Arizona State Univ., Tempe, AZ, USA
  • Volume
    41
  • Issue
    5
  • fYear
    2006
  • fDate
    5/1/2006 12:00:00 AM
  • Firstpage
    1149
  • Lastpage
    1159
  • Abstract
    A single chip quad-band multi-mode (GSM900/ DCS1800/PCS1900/CDMA2K) direct-conversion RF receiver with integrated baseband ADCs is presented. The fully integrated RF receiver is implemented in a 90-nm single poly, six level metal, standard digital CMOS process with no additional analog and RF components. The highly digital multi-mode receiver uses minimum analog filtering and AGC stages, digitizing useful signal, dynamic DC offsets and blockers at the mixer output. The direct-conversion GSM front-end utilizes resistive loaded LNAs with only two coupled inductors per LNA. The GSM front-end achieves a 31.5 dB gain and a 2.1 dB integrated noise figure with a 5 dB noise figure under blocking conditions. The CDMA2K front-end utilizes a self-biased common-gate input amplifier followed by passive mixers, achieving wideband input matching from 900 MHz up to 2.1 GHz with an IIP3 of +8 dBm. The GSM receiver consumes 38 mA from a power supply of 1.5 V and CDMA2K receiver consumes 16 mA in the low band and 21 mA in the high band. The multi-mode receiver, including LO buffers and frequency dividers, ADCs, and reference buffers, occupies 2.5 mm2.
  • Keywords
    3G mobile communication; CMOS digital integrated circuits; UHF integrated circuits; cellular radio; code division multiple access; frequency dividers; low noise amplifiers; radio receivers; 0.9 to 2.1 GHz; 1.5 V; 16 mA; 2.1 dB; 21 mA; 31.5 dB; 38 mA; 5 dB; 90 nm; AGC stages; CDMA2K receiver; CMOS integrated circuits; DCS1800 receiver; EDGE receiver; GSM receiver; GSM900 receiver; LNA; LO buffers; PCS1900 receiver; analog filtering; digital CMOS; digitizing signal; frequency dividers; integrated baseband ADC; low-noise amplifier; multimode quad-band RF receiver; passive mixers; radio frequency integrated circuits; reference buffers; self-biased common-gate input amplifier; single chip quad-band multi-mode; Baseband; Broadband amplifiers; CMOS process; Digital filters; Filtering; GSM; Gain; Inductors; Noise figure; Radio frequency; CMOS integrated circuits; low-noise amplifier; multimode; radio frequency integrated circuits; transceivers; wireless;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2006.872740
  • Filename
    1624405