DocumentCode :
916830
Title :
Architectural tradeoffs for survivor sequence memory management in Viterbi decoders
Author :
Feygin, Gennady ; Gulak, P.G.
Author_Institution :
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
Volume :
41
Issue :
3
fYear :
1993
fDate :
3/1/1993 12:00:00 AM
Firstpage :
425
Lastpage :
429
Abstract :
In a Viterbi decoder, there are two known memory organization techniques for the storage of survivor sequences from which the decoded information sequence is retrieved, namely, register exchange method and traceback method. This work extends previously known traceback approaches, describes two new traceback algorithms, and compares various traceback methods with each other. Memory size, latency, and implementational complexity of the survivor sequence management are analyzed for both uniprocessor and multiprocessor realizations of Viterbi decoders. A new, one-pointer traceback method is shown to be better than previously known traceback methods
Keywords :
decoding; storage management; Viterbi decoder; architectural tradeoffs; implementational complexity; memory organization; multiprocessor realizations; one-pointer traceback method; survivor sequence memory management; traceback method; uniprocessor realisation; Decoding; Delay; Design methodology; Energy consumption; Information retrieval; Memory management; Read-write memory; Registers; Very large scale integration; Viterbi algorithm;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/26.221067
Filename :
221067
Link To Document :
بازگشت