DocumentCode :
917512
Title :
Adaptive Latency-Insensitive Protocols
Author :
Casu, Mario R. ; Macchiarulo, Luca
Author_Institution :
Politecnico di Torino, Turin
Volume :
24
Issue :
5
fYear :
2007
Firstpage :
442
Lastpage :
452
Abstract :
Latency-insensitive protocols (LIPs) represent a class of interblock protocols designed to overcome long multiclock interconnects. This article presents an adaptive solution to this problem, which the authors show to be more effective than earlier solutions in terms of power, area, and throughput.
Keywords :
protocols; adaptive latency-insensitive protocol; interblock protocol; multiclock interconnect; CMOS logic circuits; Clocks; Delay; Frequency; Inverters; Logic design; Microprocessors; Pipeline processing; Protocols; Wire; ICs; interconnections; latency-insensitive protocols; wire pipelining;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2007.152
Filename :
4338464
Link To Document :
بازگشت