DocumentCode
918088
Title
Iterative Viterbi algorithm: implementation issues
Author
Wei, Lei
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
Volume
3
Issue
2
fYear
2004
fDate
3/1/2004 12:00:00 AM
Firstpage
382
Lastpage
386
Abstract
We address several issues for implementing the iterative Viterbi decoder. We show that 3-bit branch metric quantization, 7- or 8-bit state metric precision, and a survivor length of five times the constraint length yields little degradation for the iterative Viterbi algorithm (IVA). Our results show that without changing the VA hardware (except adding some additional circuits), the error performance of several standard systems can be significantly improved.
Keywords
Viterbi decoding; concatenated codes; iterative decoding; turbo codes; branch metric quantization; iterative viterbi algorithm; iterative viterbi decoding; serial concatenated codes; state metric precision; turbo decoding; AWGN; Circuits; Concatenated codes; Convolution; Convolutional codes; Cyclic redundancy check; Iterative algorithms; Iterative decoding; Quantization; Viterbi algorithm;
fLanguage
English
Journal_Title
Wireless Communications, IEEE Transactions on
Publisher
ieee
ISSN
1536-1276
Type
jour
DOI
10.1109/TWC.2003.821149
Filename
1271231
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