DocumentCode
918730
Title
Design for a high-speed m.o.s. associative memory
Author
Lea, Robert Mike
Author_Institution
Brunel University, Department of Electrical Engineering, Uxbridge, UK
Volume
8
Issue
15
fYear
1972
Firstpage
391
Lastpage
393
Abstract
An experimental 64-bit m.o.s. associative memory has been developed from a limit-case design study. Speeds in excess of 50 MHz are reported at a cost per bit that could approach eight times that for a conventional m.o.s. dynamic r.a.m. The design of the basic associative memory cell is described.
Keywords
associative storage; cellular arrays; metal-insulator-semiconductor devices; random-access storage; semiconductor storage devices; semiconductor storage systems; 50 MHZ; MOS; associative storage; cellular arrays; high speed memory; limit case design; random access storage; semiconductor storage systems;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19720285
Filename
4235742
Link To Document