• DocumentCode
    918845
  • Title

    A high-speed binary rate-multiplier

  • Author

    Elliott, A.R.

  • Volume
    59
  • Issue
    8
  • fYear
    1971
  • Firstpage
    1256
  • Lastpage
    1258
  • Abstract
    A digital high-speed binary rate-multiplier is described. This new circuit avoids the need for the usual differentiating networks, delayed clock pulses, or "strobe" inputs. Each flip-flop stage in the circuit is identical, allowing simple expansion to any number of bits.
  • Keywords
    Circuit stability; Circuit theory; Clocks; Counting circuits; Discrete transforms; Electrons; Feedback loop; Flip-flops; Frequency; Stability analysis;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1971.8379
  • Filename
    1450309
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=918845