A low-power 8-b 1 3.5-MHz video CMOS ADC for visiophony ISDN applications

Author

Abrial, André ; Bouvier, Jacky ; Fournier, Jean-Michel ; Senn, Patrice

Author_Institution

CNET, Meylan, France

Volume

28

Issue

7

fYear

1993

fDate

7/1/1993 12:00:00 AM

Firstpage

725

Lastpage

729

Abstract

A half-flash, subranging, 8-b, 13.5-MHz, video ADC (analog-to-digital converter) using overlapped architecture that combines the advantages of both flash and half-flash converters is described. Its conversion rate is that of a flash, without any multiplexing and with a low number of comparators. Its low power consumption and the small silicon area required for its implementation enable it to be integrated in mixed digital/analog circuits such as a video acquisition circuit devoted to visiophony applications. It has been manufactured using a CMOS 1-μm technology with two polysilicon and two metallization layers

Keywords

CMOS integrated circuits; ISDN; analogue-digital conversion; video signals; videotelephony; visual communication; 1 micron; 13.5 MHz; A/D convertor; Si; double layer metallisation; eight bit type; half-flash converters; low power consumption; low-power; mixed digital/analog circuits; overlapped architecture; polysilicon; subranging; video CMOS ADC; video acquisition circuit; visiophony ISDN applications; CMOS process; CMOS technology; Circuits; Clocks; Energy consumption; ISDN; Power generation economics; Throughput; Very large scale integration; Video compression;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.222168

Filename

222168