A 40×40 CCD/CMOS absolute-value-of-difference processor for use in a stereo vision system

An analog VLSI processor chip with application in a high-speed binocular stereo vision system used for the recovery of scene depth is presented. The authors have attempted to exploit the principal advantages of analog VLSI, namely, its small area, high speed, and low power, while minimizing the effects of its limited accuracy, inflexibility, and lack of storage capacity. A CCD/CMOS stereo system implementation, capable of processing several thousand image frame pairs per second for 40×40-pixel binocular images, is proposed. A 40×40-pixel absolute-value-of-difference (AVD) array, a core processor of the stereo system, was fabricated in a 2-μm CCD/CMOS process. Individual unit cells in the array were characterized and tested. The array functionality was tested by imbedding it in a computerized stereo system and using both real-scene and computer-generated input image pairs. The system output is compared with full computer simulations for the same image pairs, showing good correlation