DocumentCode :
919643
Title :
Metal-ceramic constraints for multilayer electronic packages
Author :
Chance, Dudley A. ; Wilcox, David L.
Author_Institution :
IBM Components Division, Hopewell Junction, N.Y.
Volume :
59
Issue :
10
fYear :
1971
Firstpage :
1455
Lastpage :
1462
Abstract :
Ceramic formulations set in an organic binder are currently being cast in thin paper-like sheets. These sheets may be punched, screened with metal pastes, and laminated to form a composite of metal and ceramic particles held together by an organic medium. By slowly burning off the organic binder and then sintering the ceramic and metal together, a substrate with many layers of interconnecting wiring may be obtained. The coincident sintering of the ceramic and metal phases presents compatibility constraints. Temperature considerations with respect to shrinkage and coefficient of expansion match between the ceramic and metal phases as well as solid/solid and solid/ambient interactions are important constraints in the fabrication of these composites. High conductivity metals (e.g., Ag, Cu) are generally not available for co-firing because sintering temperatures of important ceramic formulations are higher than the melting points of these metals. This constraint has been minimized through the use of capillary infiltration of molten metals into the ceramic structure. Consequently, it is now possible for multilayer ceramic structures to provide the interconnection wiring densities and conductivities necessary to respond to the needs of greater circuit densities of integrated circuit chips. Material selections are reviewed on the basis of electrical properties, ambient interactions, stresses due to sintering shrinkage, and thermal coefficient of expansion. Certain problems, tradeoffs, and procedures used in the fabrication of a multilayer substrate with Cu-filtrated lines are discussed.
Keywords :
Ceramics; Conductivity; Electronics packaging; Fabrication; Integrated circuit interconnections; Nonhomogeneous media; Solids; Temperature; Thermal stresses; Wiring;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/PROC.1971.8454
Filename :
1450384
Link To Document :
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