• DocumentCode
    919718
  • Title

    DC performance of InP/InGaAs p-n-p heterostructure-emitter bipolar transistor

  • Author

    Tsai, Jung-Hui ; Kang, Yu-Chi

  • Author_Institution
    Dept. of Phys., Nat. Kaohsiung Normal Univ., Taiwan
  • Volume
    53
  • Issue
    5
  • fYear
    2006
  • fDate
    5/1/2006 12:00:00 AM
  • Firstpage
    1265
  • Lastpage
    1267
  • Abstract
    The dc performance of a novel InP/InGaAs p-n-p heterostructure-emitter bipolar transistor is first demonstrated. Though the valence band discontinuity at an InP/InGaAs heterojunction is relatively large, the addition of a heavy doped as well as thin p+-InGaAs emitter layer between a p-InP confinement and n+-InGaAs base layers effectively eliminates the potential spike at emitter-base junction, lowers the emitter-collector offset voltage, and increases the barrier for electrons, simultaneously. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV are achieved. To the author´s knowledge, the offset voltage of the studied device is the lowest value among of the InP/InGaAs p-n-p heterojunction bipolar transistors.
  • Keywords
    III-V semiconductors; gallium arsenide; heterojunction bipolar transistors; indium compounds; p-n heterojunctions; valence bands; 54 mV; DC performance; InP-InGaAs; electron barrier; emitter-base junction; emitter-collector offset voltage; p-n-p heterostructure-emitter bipolar transistor; valence band discontinuity; Bipolar transistors; Electron emission; Heterojunction bipolar transistors; Indium gallium arsenide; Indium phosphide; MOCVD; Optical devices; P-n junctions; Performance gain; Voltage; Heterostructure-emitter bipolar transistor (HEBT); InP/InGaAs; offset voltage; p-n-p; potential spike;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2006.872691
  • Filename
    1624712