Fault tolerance capabilities in multistage network-based multicomputer systems

Author

Gazit, Israel ; Malek, Miroslaw

Author_Institution

Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA

Volume

37

Issue

7

fYear

1988

fDate

7/1/1988 12:00:00 AM

Firstpage

788

Lastpage

798

Abstract

The inherent fault tolerances of systems based on nonredundant multistage interconnection networks (MINs) is investigated. Graph models are used to describe the system, indicate faults, study their effects, and aid in mathematical formulation of these effects. Methodical terminology for defining functionality of two-sided-MIN-based multicomputer systems and specifying their fault tolerance of such systems is analyzed. The effects of a single faulty vertex and a single faulty edge are studied, and single fault tolerance, with respect to various definitions of system functionality, is evaluated. Multiple faults are analyzed. A practical example of the banyan network used in the Texas reconfigurable array computer (TRAC) and its fault tolerance capabilities are given

Keywords

fault tolerant computing; graph theory; multiprocessor interconnection networks; Texas reconfigurable array computer; banyan network; fault tolerances; graph models; methodical terminology; multistage network-based multicomputer systems; single faulty edge; single faulty vertex; Computer networks; Fault diagnosis; Fault tolerance; Fault tolerant systems; Information analysis; Intelligent networks; Multiprocessor interconnection networks; Redundancy; Switches; Terminology;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.2224

Filename

2224