CMOS implementation of an analogically programmable cellular neural network

Author

Betta, G. F Dalla ; Graffi, S. ; Kovács, Zs M. ; Masetti, G.

Author_Institution

Dept. of Electron., Bologna Univ., Italy

Volume

40

Issue

3

fYear

1993

fDate

3/1/1993 12:00:00 AM

Firstpage

206

Lastpage

215

Abstract

The criteria for designing the basic building blocks of an analogically programmable cellular neural network (CNN) in a 1.5-μm CMOS technology are reported. The simulated electrical performances of a 10×10 CMOS CNN, consisting of about 8000 MOS transistors, are presented and discussed. It is shown that the designed CNN can be successfully used to perform such useful functions as noise removal, edge detection, hole filling, shadow detection, and connected component recognition

Keywords

CMOS integrated circuits; analogue processing circuits; edge detection; neural chips; 1.5 micron; CMOS technology; CNN; analogically programmable cellular neural network; connected component recognition; edge detection; hole filling; noise removal; shadow detection; simulated electrical performances; Artificial neural networks; CMOS process; CMOS technology; Cellular neural networks; Circuits; Image edge detection; Image processing; MOSFETs; Signal processing; Space technology;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.222820

Filename

222820