A semi-custom protocol control logic device for FASTBUS

A gate-array device called the protocol control logic (PCL) is presented that greatly simplifies the construction of a FASTBUS slave interface. This device connects to the segment timing and control signals and together with address/data interface chips produces a simple set of signals for the user. The entire FASTBUS protocol is accommodated. Great flexibility of response is provided by many control inputs to the PCL. These allow the suppression of features that may not be desired in a particular implementation or the generation of special responses. The PCL produces several status signals to aid the user in detecting conditions of interest.<>