Strongly fault secure PLAs and totally self-checking checkers

Author

Min, Yong ; Li, Jintao

Author_Institution

Inst. of Comput. Technol., Acad. Sinica, Beijing, China

Volume

37

Issue

7

fYear

1988

fDate

7/1/1988 12:00:00 AM

Firstpage

863

Lastpage

867

Abstract

A general approach is presented to the design of totally self-checking (TSC) programmable logic arrays (PLAs). A strongly fault secure (SFS) implementation is suggested for the functional PLA, which is shown to be SFS whenever the output is encoded by two-rail code. K-unit TSC checker (TSCC) element are defined to construct TSC checkers. The TSCC is very appropriate for the companion of the SLF PLA since a given input codeword set is sufficient for testing the TSCC. The minimum number of tests needed for a type-m two-rail code K -unit TSCC is 12^m. This is a generalization of the fact that four test patterns are sufficient for testing an XOB parity checker tree. As an application, a novel design of a TSC comparator with an arbitrary number of inputs is presented

Keywords

cellular arrays; comparators (circuits); logic testing; XOB parity checker tree; comparator; programmable logic arrays; strongly fault secure PLAs; totally self-checking checkers; two-rail code; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Digital filters; Electrons; Logic arrays; Out of order; Programmable logic arrays; Speech processing;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.2233

Filename

2233