DocumentCode
922136
Title
Storage transistor delay circuit
Author
Chu-Hsien Lee
Volume
60
Issue
4
fYear
1972
fDate
4/1/1972 12:00:00 AM
Firstpage
466
Lastpage
467
Abstract
A new type of delay circuit, using two junction transistors, is reported. The circuit utilizes the charge storage effect of junction transistors, whose basis of operation differs from that of monostable circuits and electromagnetic delay lines.
Keywords
Circuits; Delay estimation; Delay lines; Inverters; Reactive power; Resistors; Sampling methods; Silicon; Space vector pulse width modulation; Statistics;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1972.8672
Filename
1450602
Link To Document