DocumentCode
922248
Title
Realisation of logic functions by multi-output threshold-logic gates
Author
Bennett, L.A.M.
Author_Institution
University College of Swansea, Department of Electrical & Electronic Engineering, Swansea, UK
Volume
129
Issue
6
fYear
1982
fDate
11/1/1982 12:00:00 AM
Firstpage
239
Lastpage
243
Abstract
Two different multi-output threshold-logic gate structures are considered and their information requirements compared. A method, based on a trial and error algorithm, is described which may be used to realise a logic function by each of these structures. The method is quite general and has been tested on a large number of functions. Some preliminary observations from these tests are presented.
Keywords
logic gates; many-valued logics; threshold logic; heuristics; logic gates; multi-output structures; threshold-logic; trial and error algorithm;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
DOI
10.1049/ip-e.1982.0045
Filename
4645424
Link To Document