Title :
On the leverage of high-fT transistors for advanced high-speed bipolar circuits
Author :
Chuang, C.T. ; Chin, K. ; Stork, J.M.C. ; Patton, G.L. ; Crabbé, E.F. ; Comfort, J.H.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
2/1/1992 12:00:00 AM
Abstract :
A detailed study on the leverage of high-fT transistors for advanced high-speed bipolar circuit applications is presented. It is shown that for the standard ECL (emitter-coupled logic) circuit, the leverage of high fT is limited by the passive resistors (emitter-follower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL (nonthreshold logic) circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high FT becomes more significant
Keywords :
bipolar integrated circuits; emitter-coupled logic; integrated logic circuits; active-pull-down schemes; collector load resistor; cutoff frequency; emitter-coupled logic; emitter-follower resistor; front-end configuration; high-speed bipolar circuits; low-power regime; nonthreshold logic; passive resistors; power supply value; standard ECL; standard NTL; wire delay; Bipolar transistor circuits; Circuit simulation; Delay effects; Doping; Fabrication; Resistors; Switches; Switching circuits; Tail; Wire;
Journal_Title :
Solid-State Circuits, IEEE Journal of
