Direct digital synthesizer with ROM-Less architecture at 13-GHz clock frequency in InP DHBT technology

Author

Turner, Steven Eugene ; Kotecki, David E.

Author_Institution

Maine Univ., Orono, ME

Volume

16

Issue

5

fYear

2006

fDate

5/1/2006 12:00:00 AM

Firstpage

296

Lastpage

298

Abstract

A direct digital synthesizer (DDS) implemented in InP double heterojunction bipolar transistor (DHBT) technology is reported. The DDS has a ROM-less architecture and instead uses digital logic for phase conversion. The DDS operates up to a 13 GHz clock rate and is capable of synthesizing output frequencies up to 6.5 GHz. Measured spurious free dynamic range (SFDR)ranged from 34 dBc at low frequency control words (FCWs) to 26.67 dBc at high FCWs. The test circuit is implemented with 1646 transistors and consumes 5.42W of power

Keywords

III-V semiconductors; bipolar MMIC; bipolar logic circuits; direct digital synthesis; indium compounds; phase convertors; 13 GHz; 5.42 W; DHBT technology; InP; ROM-less architecture; digital logic; direct digital synthesizer; double heterojunction bipolar transistor technology; frequency control words; phase conversion; spurious free dynamic range; Circuit synthesis; Circuit testing; Clocks; DH-HEMTs; Double heterojunction bipolar transistors; Dynamic range; Frequency measurement; Frequency synthesizers; Indium phosphide; Logic; Accumulator; Indium Phosphide (InP); digital to analog converter (DAC); direct digital synthesizer (DDS); heterojunction bipolar transistor (HBT); high-speed integrated circuits (ICs);

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2006.873490

Filename

1626266