DocumentCode
922561
Title
Desing and self-test for switched-current building blocks
Author
Olbrich, T. ; Richardson, Andrew
Author_Institution
Lancaster Univ., UK
Volume
13
Issue
2
fYear
1996
Firstpage
10
Lastpage
17
Abstract
This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits
Keywords
analogue-digital conversion; built-in self test; logic design; logic testing; switched current circuits; algorithmic A/D converters; built-in self-test; divide-by-two circuit; reference signal generation; self-test functions; switched-current building blocks; switched-current memory cell; Built-in self-test; Capacitors; Circuit faults; Circuit testing; Clocks; Inverters; Signal processing; Switches; Timing; Voltage;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/54.500196
Filename
500196
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