DocumentCode :
922679
Title :
Process and device characterization for a 30-GHz fT submicrometer double poly-Si bipolar technology using BF2 -implanted base with rapid thermal process
Author :
Yamaguchi, Tadanori ; Uppili, Sudarsan ; Lee, June S. ; Kawamoto, Galen H. ; Dosluoglu, Taner ; Simpkins, Shaun
Author_Institution :
Tektronix Inc., Beaverton, OR, USA
Volume :
40
Issue :
8
fYear :
1993
fDate :
8/1/1993 12:00:00 AM
Firstpage :
1484
Lastpage :
1495
Abstract :
Process and device parameters are characterized in detail for a 30-GHz fT submicrometer double poly-Si bipolar technology using a BF2-implanted base with a rapid thermal annealing (RTA) process. Temperature ramping during the emitter poly-Si film deposition process minimizes interfacial oxide film growth. An emitter RTA process at 1050°C for 30 s is required to achieve an acceptable emitter-base junction leakage current with an emitter resistance of 6.7×10-7 Ω-cm2, while achieving an emitter junction depth of 50 nm with a base width of 82 nm. The primary transistor parameters and the tradeoffs between cutoff frequency and collector-to-emitter breakdown voltage are characterized as functions of base implant dose, pedestal collector implant dose, link-base implant dose, and epitaxial-layer thickness. Transistor geometry dependences of device characteristics are also studied. Based on the characterization results for poly-Si resistors, boron-doped p-type poly-Si resistors show significantly better performance in temperature coefficient and linearity than arsenic-doped n-type poly-Si resistors
Keywords :
bipolar integrated circuits; electric breakdown of solids; integrated circuit technology; ion implantation; rapid thermal processing; 1050 degC; 30 GHz; 30 s; 50 nm; 82 nm; base implant dose; collector-to-emitter breakdown voltage; cutoff frequency; device characteristics; device parameters; emitter junction depth; emitter polysilicon film deposition process; emitter resistance; emitter-base junction leakage current; epitaxial-layer thickness; interfacial oxide film growth; linearity; link-base implant dose; pedestal collector implant dose; polysilicon bipolar technology; primary transistor parameters; rapid thermal process; temperature coefficient; temperature ramping; transistor geometry; Circuits; Cutoff frequency; Geometry; Germanium silicon alloys; Implants; Isolation technology; Rapid thermal processing; Resistors; Silicon germanium; Temperature;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.223709
Filename :
223709
Link To Document :
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