DocumentCode :
923648
Title :
Exploring Large-Scale CMP Architectures Using ManySim
Author :
Zhao, Li ; Iyer, Ravi ; Moses, Jaideep ; Illikkal, Ramesh ; Makineni, Srihari ; Newell, Don
Volume :
27
Issue :
4
fYear :
2007
Firstpage :
21
Lastpage :
33
Abstract :
Building a large-scale CMP platform requires a deep investigation of core performance impact, cache hierarchy implications, and on- and off-die bandwidth requirements. simulation speed and flexibility constitute fundamental challenges in such an evaluation. ManySim, a trace-based simulation infrastructure, provides first-order architectural insights into LCMP platforms´ performance potential and scalability bottlenecks.
Keywords :
microprocessor chips; multiprocessing systems; parallel architectures; ManySim trace-based simulation infrastructure; cache hierarchy implication; core performance; large-scale chip multiprocessor architecture; Bandwidth; Buildings; Computer architecture; Large-scale systems; Scalability; Sockets; Sun; Throughput; World Wide Web; Yarn; CMP; architecture; performance evaluation; servers; simulation techniques; workload characterization;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2007.66
Filename :
4343377
Link To Document :
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