High-breakdown-voltage MESFET with a low-temperature-grown GaAs passivation layer and overlapping gate structure

Author

Chen, Chang-Lee ; Mahoney, Leonard J. ; Manfra, Michael J. ; Smith, Frank W. ; Temme, Donald H. ; Calawa, Arthur R.

Author_Institution

MIT Lincoln Lab., Lexington, MA, USA

Volume

13

Issue

6

fYear

1992

fDate

6/1/1992 12:00:00 AM

Firstpage

335

Lastpage

337

Abstract

GaAs MESFETs were fabricated using a low-temperature-grown (LTG) high-resistivity GaAs layer to passivate the doped channel between the gate and source and between the gate and the drain. The gate was fabricated such that the source and drain edges of the metal gate overlapped the LTG GaAs passivation layer. The electric fields at the edges of the gate were reduced by this special combination of LTG GaAs passivation and gate geometry, resulting in a gate-drain breakdown voltage of 42 V. This value is over 60% higher than that of similar MESFETs fabricated without the gate overlap.<>

Keywords

III-V semiconductors; Schottky gate field effect transistors; electric breakdown of solids; gallium arsenide; passivation; 42 V; GaAs passivation layer; MESFET; electric fields; gate geometry; gate-drain breakdown voltage; high breakdown voltage device; metal gate; overlapping gate structure; Electric breakdown; Etching; Gallium arsenide; Gold; HEMTs; Interface states; MESFETs; MISFETs; Passivation; Voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.145076

Filename

145076