Title :
General channel-routing algorithm
Author :
Marek-Sadowska, M. ; Kuh, E.S.
Author_Institution :
University of California, Department of Electrical Engineering & Computer Sciences and the Electronics Research Laboratory, Berkeley, USA
fDate :
6/1/1983 12:00:00 AM
Abstract :
A new approach to the 2-layer channel-routing problem is introduced. The method allows horizontal and vertical connections on both layers. An order graph similar to the traditional vertical constraint graph is used in the algorithm. The main advantage is that the method is general and is immune to cyclic constraints. Furthermore, the channel width does not have a lower bound equal to the maximum density.
Keywords :
circuit layout CAD; integrated circuit technology; large scale integration; monolithic integrated circuits; 2-layer channel-routing problem; CAD; IC layout; VLSI layout design; horizontal connections; order graph; routing algorithm; vertical connections;
Journal_Title :
Electronic Circuits and Systems, IEE Proceedings G
DOI :
10.1049/ip-g-1:19830016
