Title :
Sub-500°C solid-phase epitaxy of ultra-abrupt p+-silicon elevated contacts and diodes
Author :
Civale, Yann ; Nanver, Lis K. ; Hadley, Peter ; Goudena, Egbert J G ; Schellevis, Hugo
Author_Institution :
Lab. of Electron. Components, Delft Univ. of Technol., Netherlands
fDate :
5/1/2006 12:00:00 AM
Abstract :
A well-controlled low-temperature process, demonstrated from 350°C to 500°C, has been developed for epitaxially growing elevated contacts and near-ideal diode junctions of Al-doped Si in contact windows to the Si substrate. A physical-vapor-deposited (PVD) amorphous silicon layer is converted to monocrystalline silicon selectively in the contact windows by using a PVD aluminum layer as a transport medium. This is a solid-phase-epitaxy (SPE) process by which the grown Si is Al-doped to at least 1018 cm-3. Contact resistivity below 10-7 Ω·cm2 is achieved to both p- and p+ bulk-silicon regions. The elevated contacts have also been employed to fabricate p+-n diodes and p+-n-p bipolar transistors, the electrical characterization of which indicates a practically defect-free epitaxy at the interface.
Keywords :
amorphous semiconductors; bipolar transistors; electrical contacts; elemental semiconductors; p-n junctions; semiconductor diodes; semiconductor growth; silicon; solid phase epitaxial growth; vapour deposited coatings; 350 to 500 C; Si; amorphous silicon; bipolar transistor; diode junctions; electrical characterization; elevated contacts; low-temperature process; monocrystalline silicon; physical vapor deposition; solid-phase epitaxy; Annealing; Atherosclerosis; Bipolar transistors; Conductivity; Contacts; Epitaxial growth; P-n junctions; Semiconductor diodes; Substrates; Temperature; Al-doping; elevated contacts; low-ohmic contacts; low-temperature processing; p-n-p bipolar junction transistors; solid-phase epitaxy; ultra-shallow junctions;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2006.873755