DocumentCode
924922
Title
Design of multistage interconnection networks
Author
Sood, A.K.
Author_Institution
Wayne State University, Department of Electrical & Computer Engineering, Detroit, USA
Volume
130
Issue
4
fYear
1983
fDate
7/1/1983 12:00:00 AM
Firstpage
109
Lastpage
115
Abstract
Interconnection networks have extensive applications in switching and reconfigurable multiprocessor systems. A number of multistage networks which can achieve a limited number of permutations have been discussed in the literature [1]. On the other hand, rearrangeable networks [6] have the property that any idle input/output pair can be connected. In most parallel-processing applications, a specified set of input/output connection patterns are required. Often these patterns cannot be achieved by networks like shuffle exchange, cube, Omega and baseline. The chief objective of the paper is to present a methodology for multistage interconnection network design. This design generally requires less switching elements than the rearrangeable network. The paper relies on the formulation of a transmittance matrix for the network. The properties of this matrix are studied with particular focus on rearrangeable networks. A control algorithm which determines the switch states required to achieve a particular permutation is established. The switching algebraic approach is particularly well suited to address the network design problem, because the switch states are explicitly exhibited in the transmittance matrix.
Keywords
multiprocessing systems; switching theory; multistage interconnection network; network design problem; switching; switching elements; transmittance matrix;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
DOI
10.1049/ip-e:19830025
Filename
4645704
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