The effects of gate field on the leakage characteristics of heavily doped junctions

A gated-diode leakage-current mechanism is reported that is dominant below 4 V in ULSI (ultra-large-scale integration) gated-diode structures. The leakage mechanism has been fully characterized for gated junctions inherent in DRAM (dynamic random access memory) storage capacitor structures and the source-drain junctions of both PMOS (p-metal-oxide-semiconductor) and NMOS device structures. The salient features of the observed leakage current are that it is thermally activated and its magnitude increases exponentially with applied gate voltage. By making measurements at cryogenic temperatures it was possible to distinguish between the reported mechanism and that of band-to-band tunneling that occurs at higher applied voltages. A theoretical model is proposed that attributes the leakage mechanism to transport-limited thermal generation within the depleted space-charge region of the heavily doped side of junctions. An analytical expression derived from the proposed model is shown to be in excellent agreement with experimental results