Title :
Clock breakthrough in ECL integrated circuits
Author_Institution :
British Telecom, Research Laboratories, Ipswich, UK
fDate :
12/1/1983 12:00:00 AM
Abstract :
Clock breakthrough in emitter-coupled-logic integrated circuits has been investigated by measurement and computer simulation of a clocked bistable operated at clock rates of 80¿320 MHz. The causes of clock breakthrough have been identified and methods of reducing the effect examined.
Keywords :
bipolar integrated circuits; emitter-coupled logic; integrated logic circuits; synchronisation; transients; ECL integrated circuits; bipolar IC; clock breakthrough; clocked bistable; computer simulation; logic circuits; measurement; second-order transients; synchronisation;
Journal_Title :
Electronic Circuits and Systems, IEE Proceedings G
DOI :
10.1049/ip-g-1:19830047