DocumentCode :
926227
Title :
Design and analysis of dynamic redundancy networks
Author :
Jeng, Menkae ; Siegel, Howard Jay
Author_Institution :
Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
Volume :
37
Issue :
9
fYear :
1988
fDate :
9/1/1988 12:00:00 AM
Firstpage :
1019
Lastpage :
1029
Abstract :
The dynamic redundancy (DR) network is investigated in relation to fault-tolerant design for multistage interconnection network (MIN) based systems. The DR network can tolerate faults in the network and support a system to tolerate processing element (PE) faults without degradation by adding spare PEs, while retaining the full capability of a multistage cube network. A variation of the DR network, the reduced DR network, is also considered, that can be implemented more cost effectively than the DR while retaining most of the advantages of the DR. The reliabilities of DR-based systems with one spare PE and the reliabilities of systems with no spare PEs are estimated and compared, and the effect of adding multiple spare PEs is analyzed
Keywords :
fault tolerant computing; multiprocessor interconnection networks; redundancy; DR-based systems; dynamic redundancy networks; fault-tolerant design; multistage interconnection network; reduced DR network; Degradation; Error correction codes; Fault tolerance; Fault tolerant systems; Multiprocessor interconnection networks; Parallel processing; Power system reliability; Redundancy; Switches; Telecommunication network reliability;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.2253
Filename :
2253
Link To Document :
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