Effect of signal transition variation on bit synchronizer performance

Author

Tsang, Chit-Sang ; Chie, Chak M.

Author_Institution

Dept. of Electr. Eng., California State Univ., Long Beach, CA, USA

Volume

41

Issue

5

fYear

1993

fDate

5/1/1993 12:00:00 AM

Firstpage

673

Lastpage

677

Abstract

The effect of the signal transition variation, due to the signal transition density, data asymmetry, and sinusoidal modulation, on the performance of the data transition tracking loop (DTTL) symbol synchronizer is addressed. These factors will affect the DTTL performance, such as the clock jitter and the cycle slippage rate, and unnecessary system loss may result if the system parameters are not well selected. Given the background of C. S. Tsang and W. C. Lindsey (1986), this result can serve as an engineering design guideline for the DTTL in the context of the signal transition variation

Keywords

digital communication systems; modulation; signal detection; synchronisation; DTTL; baseband signal detection; bit synchronizer performance; clock jitter; cycle slippage rate; data asymmetry; data transition tracking loop; engineering design; signal transition density; signal transition variation; sinusoidal modulation; symbol synchronizer; system loss; system parameters; Bandwidth; Baseband; Clocks; Distortion; Jitter; Optical signal processing; Signal design; Synchronization; Timing; Tracking loops;

fLanguage

English

Journal_Title

Communications, IEEE Transactions on

Publisher

ieee

ISSN

0090-6778

Type

jour

DOI

10.1109/26.225481

Filename

225481