DocumentCode
926991
Title
Going beyond worst-case specs with TEAtime
Author
Uht, Augustus K.
Author_Institution
Rhode Island Univ., RI, USA
Volume
37
Issue
3
fYear
2004
fDate
3/1/2004 12:00:00 AM
Firstpage
51
Lastpage
56
Abstract
Virtually all engineers use worst-case component specifications for new system designs, thereby ensuring that the resulting product will operate under worst-case conditions. However, given that most systems operate under typical operating conditions that rarely approach the demands of worst-case conditions, building such robust systems incurs a significant performance cost. Further, classic worst-case designs do not adapt to variations in either manufacturing or operating conditions. A timing-error-avoidance prototype provides a circuit and system solution to these problems for synchronous digital systems. TEAtime has demonstrated much better performance than classically designed systems and also adapts well to varying temperature and supply-voltage conditions.
Keywords
logic CAD; performance evaluation; synchronisation; timing; TEAtime; performance cost; supply-voltage conditions; synchronous digital systems; timing-error-avoidance prototype; varying temperature conditions; worst-case component specifications; Clocks; Computer errors; Costs; Delay systems; Digital systems; Frequency; Manufacturing; Microcontrollers; Temperature; Timing;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/MC.2004.1274004
Filename
1274004
Link To Document