Memory interference in multimicroprocessor systems with a time-shared bus

Two mathematical models are presented for the analysis of memory interference in time-shared-bus multimicroprocessor systems. The first is a discrete-time queuing model and the second is a Markov model. The measure of performance in each case is the fractional increase in execution time resulting from bus contention. Another measure, which is derived from this, is the speed up of the multiprocessor as compared to a uniprocessor. These models are tailored to suit the requirements of real-time microprocessor systems and thus are different from much of the literature on memory interference which is directed toward general-purpose multiprocessor systems. The validity of the models is verified by comparison with simulation results and actual hardware measurements.