• DocumentCode
    928328
  • Title

    An architecture for a video rate two-dimensional fast Fourier transform processor

  • Author

    Taylor, G.F. ; Steinvorth, R.H. ; McDonald, J.F.

  • Author_Institution
    Bipolar Integrated Technol., Beaverton, OR, USA
  • Volume
    37
  • Issue
    9
  • fYear
    1988
  • fDate
    9/1/1988 12:00:00 AM
  • Firstpage
    1145
  • Lastpage
    1148
  • Abstract
    A description of an architecture capable of computing two-dimensional fast Fourier transforms on a 256×256 pixel image at a rate of 30 images per second is presented. The architecture consists of a small number of basic building blocks which may be repeated to yield any desired performance. To achieve video rate performance, 16 butterfly processors, arranged as four coupled clusters of four processors each, and nine working memories are required. Because of the parallelism and pipelining used in the design, the system clock needed to achieve this high level of performance is only 240 ns
  • Keywords
    computer architecture; computerised picture processing; fast Fourier transforms; parallel architectures; pipeline processing; architecture; butterfly processors; fast Fourier transform processor; fast Fourier transforms; parallelism; pipelining; video rate; video rate performance; Circuit testing; Computer architecture; Fast Fourier transforms; Fourier transforms; Image processing; Integrated circuit testing; Pixel; Registers; Strontium; Turning;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.2269
  • Filename
    2269