The impact of signal transition time on path delay computation

It has been recognized for some time that nonzero signal rise and fall times contribute to gate propagation delays. Practically, however, most timing analysis tools ignore these contributions when computing path delays and identifying critical paths in combinational circuits. A description is given of how these rise and fall times can be incorporated into path analysis algorithms. It is shown that signal transition time information can be accounted for in a simple and efficient preprocessing step followed by the application of standard path analysis methods. This two-step approach is shown to predict path delays with sufficient accuracy without unnecessarily complicating path analysis