Title :
Parameters for optimization of device productivity at wafer level
Author :
Ferris-Prabhu, Albert V.
Author_Institution :
IBM Corp., Essex Junction, VT, USA
fDate :
4/1/1992 12:00:00 AM
Abstract :
The parameters that affect the productivity-wafer size, design system, levels of vertical integration, minimum feature dimension, chip size, and defect density-are examined. Expressions in terms of these parameters are given for the chip size that optimizes productivity at the wafer level. Figures of merit are shown for determination of the optimal design point
Keywords :
design engineering; integrated circuit manufacture; optimisation; chip size; defect density; design system; device productivity; figures of merit; minimum feature dimension; optimal design point; optimization; vertical integration; wafer level; wafer size; Circuit testing; Constraint theory; Equations; Helium; Integrated circuit manufacture; Logic devices; Logic testing; Metallization; Productivity; Ultra large scale integration;
Journal_Title :
Electron Devices, IEEE Transactions on
