DocumentCode
928782
Title
Self-Testing the Motorola MC6804P2
Author
Kuban, John R. ; Bruce, William C.
Author_Institution
Motorola
Volume
1
Issue
2
fYear
1984
fDate
5/1/1984 12:00:00 AM
Firstpage
33
Lastpage
41
Abstract
The internal serial architecture of the MC6804P2??Motorola´s smallest 8-bit, single-chip microcomputer??and the need to minimize test costs led to development of a built-in self-test scheme. The self test is based on a ROM-driven signature analysis technique that utilizes polynomial division to compress lengthy output responses (or signatures) to much smaller results. On-chip signature analysis is an attractive alternative to conventional testing. The signature register, associated control logic, and 288 bytes of self-test ROM occupy less than 5 percent of total chip area. High fault coverage and support for parametric testing with minimal chip area are keys to successful application. This was the authors´ first experience with on-chip signature analysis in a commercial MOS microcomputer, but the usefulness of the technique for testing and data compression will undoubtedly find its way into future Motorola products.
Keywords
Application software; Automatic testing; Built-in self-test; Circuit testing; Conference proceedings; Logic testing; Read only memory; Shift registers;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.1984.5005606
Filename
5005606
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