• DocumentCode
    928797
  • Title

    Non-quasi-static effects in advanced high-speed bipolar circuits

  • Author

    Wu, B.S. ; Chuang, C.T. ; Chin, K.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • Volume
    28
  • Issue
    5
  • fYear
    1993
  • fDate
    5/1/1993 12:00:00 AM
  • Firstpage
    613
  • Lastpage
    617
  • Abstract
    A detailed study on the non-quasi-state (NQS) effects in advanced high-speed bipolar circuits is presented. An NQS Gummel-Poon-compatible lumped circuit model, which accounts for carrier propagation delays across various quasi-neutral regions in bipolar devices, is implemented in the ASTAP circuit simulator. The effects are then evaluated and compared with those for the conventional Gummel-Poon model for the emitter-coupled logic (ECL) circuit, the non-threshold-logic (NTL) circuit, and various advanced circuits utilizing active-pull-down schemes. For the ECL circuit, the effect decreases with reduced power level and increased loading. For the NTL circuit, due to its front-end configuration, the effect is more significant than that for the ECL circuit but tends to increase with reduced power level. As the passive resistors (and the associated parasitic RC effect) are decoupled from the delay path and the circuit delay is made more intimately related to the intrinsic speed of the devices in various advanced active-pull-down circuits, the delay degradation due to NQS effect becomes more significant
  • Keywords
    bipolar integrated circuits; circuit analysis computing; delays; emitter-coupled logic; equivalent circuits; integrated logic circuits; ASTAP circuit simulator; ECL circuit; Gummel-Poon model; NQS effect; NTL circuit; active-pull-down schemes; carrier propagation delays; circuit delay; delay degradation; digital circuits; emitter-coupled logic; high-speed bipolar circuits; logic circuits; lumped circuit model; non-threshold-logic; nonquasi-static effects; Capacitors; Circuit simulation; Coupling circuits; Delay effects; Logic circuits; Propagation delay; Resistors; Semiconductor process modeling; Solid modeling; Steady-state;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.229392
  • Filename
    229392