• DocumentCode
    928799
  • Title

    SILCA: SPICE-accurate iterative linear-centric analysis for efficient time-domain Simulation of VLSI circuits with strong parasitic couplings

  • Author

    Li, Zhao ; Shi, C. -J Richard

  • Author_Institution
    Dept. of Electr. Eng., Univ. of Washington, Seattle, WA
  • Volume
    25
  • Issue
    6
  • fYear
    2006
  • fDate
    6/1/2006 12:00:00 AM
  • Firstpage
    1087
  • Lastpage
    1103
  • Abstract
    A new circuit analysis method, named SPICE-accurate iterative linear-centric analysis (SILCA), is proposed for the efficient and accurate time-domain simulation of deep submicron very large scale integrated (VLSI) circuits with strong parasitic couplings. SILCA consists of two key linear-centric techniques applied to time-domain nonlinear circuit simulation. For numerical integration, explicit-formula substitution and iterative-formula transformation are presented to convert implicit variable time-step integration to fixed leading coefficient (FLC) variable time-step integration. This paper characterizes both convergence and stability properties of the resulting FLC integration formulae. For nonlinear iteration, a successive variable chord (SVC) method is used as an alternative to the Newton-Raphson method. Further, the low-rank update technique is implemented for fast LU factorization. With these techniques, the number and cost of required LU factorizations are reduced dramatically. Experimental results on nonlinear circuits coupled with substrate and power/ground networks have demonstrated that SILCA achieves more than an order of magnitude speedup over SPICE3 in terms of both the cost of LU factorization and the overall CPU time. SILCA is suitable for efficient SPICE-like time-domain simulation of parasitic-coupled VLSI circuits, where the number of linear parasitic elements dominates the number of nonlinear devices
  • Keywords
    VLSI; circuit simulation; iterative methods; network analysis; time-domain analysis; SILCA; SPICE-accurate iterative linear-centric analysis; VLSI circuits; explicit-formula substitution; fixed leading coefficient variable time-step integration; iterative-formula transformation; nonlinear circuit simulation; parasitic couplings; successive variable chord; time-domain simulation; Analytical models; Circuit analysis; Circuit simulation; Convergence; Costs; Coupling circuits; Iterative methods; Nonlinear circuits; Time domain analysis; Very large scale integration; Circuit simulation; time-domain analysis;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2005.855943
  • Filename
    1629142