Low-voltage scaled CMOS and BiCMOS digital circuits

Author

Bellaouar, A. ; Embabi, S.H.K. ; Elmasry, M.I.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Volume

Issue

fYear

1992

fDate

4/1/1992 12:00:00 AM

Firstpage

1005

Lastpage

1009

Abstract

A mixed two-dimensional numerical device/circuit simulation analysis of scaled BiCMOS and CMOS circuits is presented. Submicrometer processes with 0.4-μm design rules operating at a power supply down to 2.8 V are examined. It is shown that when subjected to scaling, conventional BiCMOS maintains its superior performance compared to that of CMOS even at scaled power supplies

Keywords

BIMOS integrated circuits; CMOS integrated circuits; circuit analysis computing; digital integrated circuits; 0.4 micron; 2.8 V; BiCMOS digital circuits; CMOS digital circuits; design rules; low voltage scaling; mixed two-dimensional numerical device/circuit simulation; scaled power supplies; submicrometre processes; BiCMOS integrated circuits; CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Degradation; Digital circuits; Power supplies; Process design; Very large scale integration; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.127495

Filename

127495

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=929008