Icon: A Tool for Design at Schematic, Virtual Grid, and Layout Levels

The design of a custom VLSI chip requires work at several levels of abstraction. For example, random logic is naturally described as schematics, hand-entered layouts are naturally entered on a virtual grid, and machine-generated or compacted layouts are edited on an accurate, geometrically fixed grid. Icon is a new computer-aided design tool that allows these aspects of design to be handled simultaneously. It provides a schematics entry and simulation system, a virtual-grid compacter, and a layout editor. The user interface is consistent across these functions, and it is possible to mix them on the screen. In particular, Icon allows the user to insert pieces of layout, such as PLAs, directly into a schematic. This eliminates the effort of developing a logic diagram for them and provides accurate simulation with both interactive graphics and program level capabilities. Several dozen full-custom NMOS and CMOS chips have been designed with Icon, including a number of local area network support chips, a high-speed RAM, and high bandwidth data switches.