DocumentCode
929918
Title
How does processor MHZ relate to end-user performance? I. Pipelines and functional units
Author
White, Steven W. ; Hester, Phil D. ; Kemp, Lack W. ; McWilliams, G. Jeanette
Author_Institution
IBM, Austin, TX, USA
Volume
13
Issue
4
fYear
1993
Firstpage
8
Lastpage
16
Abstract
Two processors that compete in the workstation/server markets are compared. The 62.5-MHz IBM RISC System/6000 Model 580 (RS1) exemplifies a moderate clock rate design. As the highest SPECmark89/MHz system it can be viewed as maximizing the work performed per cycle. the 133-/200-MHz DEC Alpha processor represents an aggressive clock rate design. At 200 MHz, the Alpha has the highest MHz rate in the market. The authors discuss clock rate goals, how they influence design choices, and performance implications. The primary advantage for the Alpha design appears to be the high clock rate. The RS1 design includes a significant amount of hardware to increase in superscalar capability, especially on floating-point codes. RS1 has a significant infinite cache CPI advantage on floating-point applications. Infinite cache CPI for the two designs seem comparable on fixed-point codes.<>
Keywords
microprocessor chips; reduced instruction set computing; 133 to 200 MHz; 62.5 MHz; DEC Alpha processor; IBM RISC System/6000 Model 580; RS1; SPECmark89/MHz system; floating-point codes; functional units; pipelines; Arithmetic; Clocks; Difference equations; Libraries; Performance gain; Pipelines; Process design; Reduced instruction set computing; Strips;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/40.229710
Filename
229710
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