DocumentCode
931563
Title
Threshold decomposition of gray-scale morphology into binary morphology
Author
Shih, F.Y. ; Mitchell, Owen Robert
Author_Institution
Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
11
Issue
1
fYear
1989
fDate
1/1/1989 12:00:00 AM
Firstpage
31
Lastpage
42
Abstract
Recently, a superposition property called threshold decomposition and another property called stacking were introduced and shown to apply successfully to gray-scale morphological operations. This property allows gray-scale signals to be decomposed into multiple binary signals. The signals are processed in parallel, and the results are combined to produce the desired gray-scale result. The authors present the threshold decomposition architecture and the stacking property that allows the implementation of this architecture. Gray-scale operations are decomposed into binary operations. This decomposition allows gray-scale morphological operations to be implemented using only logic gates in VLSI architectures that can significantly improve speed as well as give theoretical insight into the operations
Keywords
VLSI; computerised picture processing; digital signal processing chips; parallel architectures; VLSI; binary morphology; computerised picture processing; gray-scale morphology; logic gates; multiple binary signals; parallel processing; stacking; threshold decomposition architecture; Computer architecture; Gray-scale; Image processing; Inspection; Logic gates; Morphological operations; Morphology; Shape; Stacking; Very large scale integration;
fLanguage
English
Journal_Title
Pattern Analysis and Machine Intelligence, IEEE Transactions on
Publisher
ieee
ISSN
0162-8828
Type
jour
DOI
10.1109/34.23111
Filename
23111
Link To Document