DocumentCode :
931900
Title :
Block codes capable of correcting both additive and timing errors
Author :
Iizuka, Ikuo ; Kasahara, Masao ; Namekawa, Toshihiko
Volume :
26
Issue :
4
fYear :
1980
fDate :
7/1/1980 12:00:00 AM
Firstpage :
393
Lastpage :
400
Abstract :
Binary block codes are constructed that are capable of correcting successive timing errors such as the deletion or insertion of s bits (s\\leq D) within a single additive burst of errors of length b or less (b=f+g+2D) , where f and D are the design parameters that specify the length of correctable successive timing errors and g is the length of the correctable additive burst. A decoding algorithm is given and the efficiency of these codes is discussed.
Keywords :
Block codes; Synchronization; Additives; Atomic clocks; Block codes; Decoding; Error correction; Error correction codes; Interleaved codes; Reliability engineering; Synchronization; Timing;
fLanguage :
English
Journal_Title :
Information Theory, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9448
Type :
jour
DOI :
10.1109/TIT.1980.1056219
Filename :
1056219
Link To Document :
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