Title :
Design of a divide-by-N asynchronous odd-number counter with 50/50 duty cycle
Author_Institution :
The University of Akron, Akron, Ohio
Abstract :
Methods of designing an asynchronous divide-by-N odd-number counter with 50/50 duty-cycle output are presented. The counter can be implemented by an EXCLUSIVE OR gate associated with a divide-by-(N + 1)/2 counter and a flip-flop, or by the combination of EXCLUSIVE OR gates and flip-flops.
Keywords :
Clocks; Counting circuits; Design methodology; Digital systems; Flip-flops; Frequency conversion; Oscillators; Propagation delay; Signal generators;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/PROC.1974.9606
